DocumentCode
3106856
Title
Easily customizable open soft processor cores
Author
Yamawaki, Akira ; Chayamichi, H. ; Iwane, Masahiko
Author_Institution
Dept. of Electr. Eng., Kyushu Inst. of Technol., Kitakyushu, Japan
fYear
2004
fDate
18-19 Nov. 2004
Firstpage
79
Lastpage
80
Abstract
Intellectual property (IP) is used widely to design a system-on-chip (SOC) for mobile phone, industrial robot and so on. We are developing the processor free IPs that every one can try without any limitation. They are written in VHDL, and the inside of them can be customized easily for the user systems, just as user likes. Also, the bus interface of our IPs is traditional and very simple. Thus, user can adapt them easily to the desired bus standard and devices, using a simple wrapper. In this paper, we demonstrate the case studies using our open cores. The result shows that our IPs can be customized easily for a SOC multiprocessor without increasing hardware cost significantly and run on a commercial system practically.
Keywords
hardware description languages; industrial property; public domain software; system-on-chip; bus interface; customizable open soft processor cores; industrial robot; intellectual property; mobile phone; processor free IP; system-on-chip; CADCAM; Computer aided manufacturing; Costs; Decoding; Hardware; Instruction sets; Pipelines; Registers; Service robots; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Robotics and Automation, 2004. TExCRA '04. First IEEE Technical Exhibition Based Conference on
Print_ISBN
0-7803-8564-0
Type
conf
DOI
10.1109/TEXCRA.2004.1425008
Filename
1425008
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