DocumentCode
3107028
Title
Defect oriented fault diagnosis for semiconductor memories using charge analysis: theory and experiments
Author
De Paúl, I. ; Rosales, M. ; Alorda, B. ; Segura, J. ; Hawkins, C. ; Soden, J.
Author_Institution
Univ. de les Illes Balears, Palma de Mallorca, Spain
fYear
2001
fDate
2001
Firstpage
286
Lastpage
291
Abstract
We evaluated a diagnostic technique based on the charge delivered to the IC during a transition. Charge computed from the transient supply current is related to the circuit internal activity. A specific activity can be forced into the circuit using appropriate test vectors to highlight possible defect locations. Experimental results from a small test circuit and a 256 K SRAM demonstrate the experimental viability of the technique. The theoretical foundation is also discussed
Keywords
fault diagnosis; integrated circuit testing; integrated memory circuits; transient analysis; SRAM; charge analysis; circuit internal activity; defect oriented fault diagnosis; experimental viability; semiconductor memories; test vectors; transient supply current; CMOS logic circuits; Capacitors; Charge measurement; Circuit testing; Current measurement; Current supplies; Fabrication; Fault diagnosis; Integrated circuit measurements; Logic testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location
Marina Del Rey, CA
Print_ISBN
0-7695-1122-8
Type
conf
DOI
10.1109/VTS.2001.923451
Filename
923451
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