DocumentCode
3107140
Title
Hazard Checking of Timed Asynchronous Circuits Revisited
Author
Béal, Frédéric ; Yoneda, Tomohiro ; Myers, Chris J.
Author_Institution
Tokyo Inst. of Technol., Tokyo
fYear
2007
fDate
10-13 July 2007
Firstpage
51
Lastpage
60
Abstract
This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from statespace explosion, or efficient algorithms which use a (conservative) approximation to avoid state-space explosion but can result in the rejection of designs which are valid. In particular, [7] presents a timed extention of the work in [1] which is very efficient but is not able to handle circuits with internal loops, which prevents its use in some cases. We propose a new approach to the problem in order to overcome the mentioned limitations, without sacrificing efficiency. To do so, we first introduce a general framework targeted at the conservative checking of safety failures. This framework is not restricted to the checking of timed asynchronous circuits. Secondly, we propose a new (conservative) semantics for timed circuits, in order to use the proposed framework for hazard checking of such circuits. Using this framework with the proposed semantics yields an efficient algorithm that addresses the limitations of the previous approaches.
Keywords
asynchronous circuits; hazard checking; internal loops; safety failures; state- space explosion; timed asynchronous circuits; Algorithm design and analysis; Approximation algorithms; Asynchronous circuits; Circuit synthesis; Cities and towns; Explosions; Hazards; Informatics; Safety; Signal synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Application of Concurrency to System Design, 2007. ACSD 2007. Seventh International Conference on
Conference_Location
Bratislava
ISSN
1550-4808
Print_ISBN
0-7695-2902-X
Type
conf
DOI
10.1109/ACSD.2007.52
Filename
4276264
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