On design of two-stage CIC compensation filter

This paper presents the compensation filter design for the two-stage CIC decimation filter. The goal is twofold: to avoid the integrator section at high input rate and obtain a low wideband passband droop of the overall filter. To this end the decimation is split into two stages with the cascaded less order RRS filters at each stage. The first stage can be implemented either in non recursive form or using the polyphase decomposition. The simple compensation filter and the sharpening are applied to the second section where RRS filter is implemented as a CIC filter. The resulting structure is a multiplierless and with no integrators at high input rate. Additionally, the structure exhibits a low passband droop and a high stopband attenuation.