Title :
Design of the Tera MTA integrated circuits
Author :
Howard, M. ; Kopser, A.
Author_Institution :
Tera Comput. Co., Seattle, WA, USA
Abstract :
The Tera MTA (Multi-Threaded Architecture) computer system is a scalable shared memory multiprocessor implemented in semi-custom GaAs ICs. This paper gives an overview of attributes of the Tera MTA architecture that influenced the chip design. It then describes the IC technology selection, design methodology, and yield enhancements.
Keywords :
III-V semiconductors; application specific integrated circuits; gallium arsenide; integrated circuit design; integrated circuit technology; integrated circuit yield; parallel architectures; shared memory systems; GaAs; IC technology; Multi-Threaded Architecture computer system; Tera MTA integrated circuit; chip design; scalable shared memory multiprocessor; semi-custom GaAs IC; yield; Bandwidth; Business; Central Processing Unit; Chip scale packaging; Clocks; Computer aided manufacturing; Computer architecture; Delay; Gallium arsenide; Process design;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4083-3
DOI :
10.1109/GAAS.1997.628228
