مرکز منطقه ای اطلاع رساني علوم و فناوري - Hierarchical Random Simulation Approach For The Verification Of S/390 Cmos Multiprocessors

DocumentCode :

310915

Title :

Hierarchical Random Simulation Approach For The Verification Of S/390 Cmos Multiprocessors

Author :

Walter, Jörg ; Leenstra, Jens ; Döttling, Gerhard ; Leppla, Bernd ; Münster, Hans-Jürgen ; Kark, Kevin ; Wile, Bruce

Author_Institution :

IBM

fYear :

1997

fDate :

9-13 June 1997

Firstpage :

Lastpage :

Keywords :

CMOS process; Circuit faults; Computer simulation; Hardware; Logic; Multiprocessing systems; Permission; Protocols; System testing; Timing;

fLanguage :

English

Publisher :

ieee

Conference_Titel :

Design Automation Conference, 1997. Proceedings of the 34th

Conference_Location :

Anaheim, CA, USA

ISSN :

0738-100X

Print_ISBN :

0-7803-4093-0

Type :

conf

DOI :

10.1109/DAC.1997.597123

Filename :

597123

Link To Document :