Notice of RetractionCharacterization Analysis of a High Speed, Low Resolution ADC Based on Simulation Results for Different Resolutions

Notice of Retraction

After careful and considered review of the content of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE´s Publication Principles.

We hereby retract the content of this paper. Reasonable effort should be made to remove all past references to this paper.

The presenting author of this paper has the option to appeal this decision by contacting TPII@ieee.org.

Analog to digital converters are an important system building block, as an interface between analog and digital world. Parallel comparator type (flash) ADCs is used in high speed, low resolution applications. This paper presents the characterization analysis of CMOS flash ADCs under Threshold inverter technique for different resolutions, the effect of the VLSB (step size) of the comparator on the performance of the ADC i. e. its sampling rate in MSPS, the change in average power consumption of the ADCs with increasing resolution, the change in delay with increasing resolution. Since the main aim of this work is provide for comparison and characterization analysis for different resolutions simultaneously therefore 130 nm technology has been used for the sake of simplicity.