DocumentCode
3109464
Title
Testability issues in analog cellular neural networks
Author
Huertas, José ; Rueda, Adoración
Author_Institution
Centro Nacional de Microelectronica, Sevilla Univ., Spain
fYear
1990
fDate
16-19 Dec 1990
Firstpage
172
Lastpage
176
Abstract
Addresses the problem of testing an ACNN by postulating the need of including some extra hardware to rend feasible a post-fabrication test. The work presented deals with a test methodology based on adding some extra circuitry to every cell of a regular ACNN. This methodology is just an initial proposal for taking an advantage of the network regularity to perform a global test that can be externally interpreted and, hence, has potential application for reconfiguring the network
Keywords
VLSI; cellular arrays; integrated circuit testing; neural nets; IC testing; VLSI; analog cellular neural networks; network regularity; post-fabrication test; testability; Cellular neural networks; Circuit faults; Circuit testing; Computer networks; Fabrication; Hardware; Intelligent networks; Large-scale systems; Performance evaluation; Proposals;
fLanguage
English
Publisher
ieee
Conference_Titel
Cellular Neural Networks and their Applications, 1990. CNNA-90 Proceedings., 1990 IEEE International Workshop on
Conference_Location
Budapest
Type
conf
DOI
10.1109/CNNA.1990.207522
Filename
207522
Link To Document