5 GHz /spl Sigma//spl Delta/ analog-to-digital converter with polarity alternating feedback comparator

Author

Miyashita, T. ; Olmos, A. ; Nihei, M. ; Watanabe, Y.

Author_Institution

Fujitsu Labs. Ltd., Atsugi, Japan

fYear

1997

fDate

12-15 Oct. 1997

Firstpage

91

Lastpage

94

Abstract

We designed and fabricated a 5 GHz oversampling, 100 MHz bandwidth continuous time second order /spl Sigma//spl Delta/ analog-to-digital converter (ADC) using 0.4-/spl mu/m InGaP/-InGaAs enhancement and depletion mode high electron mobility transistor (E/D HEMT) technology. We propose the polarity alternating feedback (PAF) technique for enhancing the sampling frequency and have applied it in the design of an ADC circuit. The fabricated ADC shows a signal-to-noise ratio (SNR) of 43 dB (7.3 bits) under a differential clock of 4.9 GHz with a power dissipation of 400 mW.

Keywords

HEMT integrated circuits; III-V semiconductors; circuit feedback; comparators (circuits); continuous time systems; gallium arsenide; indium compounds; sigma-delta modulation; 0.4 micron; 100 MHz; 400 mW; 5 GHz; ADC circuit; InGaP-InGaAs; InGaP/-InGaAs E/D HEMT technology; continuous time second order /spl Sigma//spl Delta/ analog-to-digital converter; differential clock; enhancement and depletion mode high electron mobility transistor; oversampling; polarity alternating feedback comparator; power dissipation; signal-to-noise ratio; Analog-digital conversion; Bandwidth; Clocks; D-HEMTs; Feedback circuits; Frequency; HEMTs; MODFETs; Sampling methods; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual

Conference_Location

Anaheim, CA, USA

ISSN

1064-7775

Print_ISBN

0-7803-4083-3

Type

conf

DOI

10.1109/GAAS.1997.628245

Filename

628245