• DocumentCode
    3109798
  • Title

    Substrate-induced gate lag in ion-implanted GaAs MESFETs

  • Author

    Bao, J.W. ; Du, X. ; Shirokov, M.S. ; Leoni, R.E. ; Hwang, J.C.M.

  • Author_Institution
    Lehigh Univ., Bethlehem, PA, USA
  • fYear
    1997
  • fDate
    12-15 Oct. 1997
  • Firstpage
    161
  • Lastpage
    164
  • Abstract
    Gate lag in ion-implanted GaAs MESFETs has been investigated by using a novel pulsed S-parameter/waveform measurement technique. The results indicate that, for the present devices, gate lag is mainly caused by substrate-trap-induced threshold-voltage shift. Since these traps are required to ensure the substrate is semi-insulating, effective channel/substrate isolation is crucial for minimizing gate lag of these devices. The same technique can be used to assess the relative importance of surface vs. substrate traps to other types of devices and to help optimize their structures.
  • Keywords
    III-V semiconductors; S-parameters; Schottky gate field effect transistors; electron traps; gallium arsenide; ion implantation; substrates; GaAs; channel/substrate isolation; gate lag; ion-implanted GaAs MESFET; pulsed S-parameter/waveform measurement; semi-insulating substrate; substrate traps; surface traps; threshold voltage; Buffer layers; Capacitance measurement; FETs; Gallium arsenide; Ion implantation; MESFETs; Measurement techniques; Parasitic capacitance; Pulse measurements; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual
  • Conference_Location
    Anaheim, CA, USA
  • ISSN
    1064-7775
  • Print_ISBN
    0-7803-4083-3
  • Type

    conf

  • DOI
    10.1109/GAAS.1997.628260
  • Filename
    628260