Title :
International Test Conference 1988 Proceedings - New Frontiers in Testing (Cat. No.88CH2610-4)
Abstract :
The following topics are dealt with: test hardware; board testing; microprocessor testing; software and hardware approaches to fault simulation; ULTIMATE test systems; boundary scan architecture; design for testability; microprocessor test features; ATE (automatic test equipment); component ATE timing accuracy specifications; testability standards; TISS (tester independent support software system); test education; high-level test generation; weighted pseudorandom pattern generation for built-in self test; BIST (built-in self test); test quality; test economics; testing yield; BIST-based signature analysis design and evaluation; static random-access memory (SRAM) test methods; reliability test detection strategies; BIST control and test scheduling; computer-aided engineering (CAE); workstations; impact of defects on shipped quality; interconnection problems; fault modeling; high-speed probing; optically-based testing; mixed-signal testing; analog design for testability; systems test; electron-beam (E-beam) testing; concurrent BIST techniques; VLSI processor test techniques; and delay testing. Abstracts of individual papers can be found under the relevant classification codes in this or other issues
Keywords :
CAD/CAM; VLSI; automatic test equipment; automatic testing; economics; electronic equipment testing; engineering workstations; fault location; integrated circuit testing; logic testing; measurement standards; optical testing; printed circuit testing; random-access storage; ATE; BIST; CAE; SRAM; ULTIMATE; VLSI processor test; analog design; board testing; boundary scan architecture; built-in self test; computer-aided engineering; delay testing; design for testability; electron beam testing; fault modeling; fault simulation; high-level test generation; high-speed probing; interconnection; microprocessor testing; mixed-signal testing; optically-based testing; reliability test detection; shipped quality; signature analysis; static random-access memory; systems test; test economics; test education; test hardware; test quality; test scheduling; testability standards; tester independent support software system; testing yield; timing accuracy specifications; weighted pseudorandom pattern generation; workstations;
Conference_Titel :
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-8186-0870-6
DOI :
10.1109/TEST.1988.207763
