Title :
Power IC design for testability
Author :
Devore, Joe ; Marshall, Andrew ; McCoy, Tim
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
fDate :
30 Apr-3 May 1995
Abstract :
Power integrated circuits (PICs) have become much more complex as voltage and current levels and logic content have increased. This has driven numerous advances in testing PICs, both in test hardware and software. Designs have been modified for improved ease of testing. We describe here the design for testability features of a power IC which incorporates two switch-mode power supplies (SMPS) and twelve power outputs which drive three motors
Keywords :
design for testability; integrated circuit design; integrated circuit testing; motor drives; power integrated circuits; switched mode power supplies; design for testability; motor drives; power integrated circuits; switch-mode power supplies; Atherosclerosis; Circuit testing; DC motors; Design for testability; EPROM; Integrated circuit testing; Logic circuits; Oscillators; Power integrated circuits; Probes;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.521418
