• DocumentCode
    3110252
  • Title

    Integrated pin electronics for a VLSI test system

  • Author

    Branson, Chris ; Murray, Don ; Sullivan, Steve

  • Author_Institution
    Tektronix Inc., Beaverton, OR, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    23
  • Lastpage
    27
  • Abstract
    Drivers, comparators, active loads, and per-pin timing circuitry for a VLSI test system are placed in two CMOS integrated circuits. This level of integration allows fast, low-capacitance pin electronics to be manufactured at relatively low cost. Novel design and calibration techniques are used to overcome limitations of CMOS technology
  • Keywords
    CMOS integrated circuits; VLSI; calibration; integrated circuit technology; test equipment; CMOS integrated circuits; IC technology; VLSI test system; active loads; calibration; comparators; drivers; integrated pin electronics; low-capacitance pin electronics; per-pin timing circuitry; CMOS integrated circuits; CMOS technology; Circuit testing; Driver circuits; Electronic equipment testing; Integrated circuit testing; Manufacturing; System testing; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207776
  • Filename
    207776
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3110252