DocumentCode :
3110305
Title :
Board-level diagnosis by signature analysis
Author :
Karpovsky, M.G. ; Nagvajara, P.
Author_Institution :
Dept. of Electr., Comput. & Syst. Eng., Boston Univ., MA, USA
fYear :
1988
fDate :
12-14 Sep 1988
Firstpage :
47
Lastpage :
53
Abstract :
Board-level diagnostic techniques by signature analysis based on single-error-correcting Hamming codes over GF(2M) (where M is the number of outputs per chip) are presented. Two techniques are considered: the space-time compressor technique for the case when responses from N chips on the board are wired to the compressor; and the time compressor technique for the case when test responses from each chip are transferred to the compressor via system bus. Assuming a single-faulty-chip model, a faulty chip on the board under test is located by an analysis of the relationship between the distortions in the obtained signatures. Both techniques for board-level diagnosis require less hardware than the straightforward diagnostic techniques using a built-in signature analyzer for every chip or selective testing of each chip via the system bus, hence offering an efficient approach for a design of a built-in-self-test board for for manufacturing testing
Keywords :
error correction codes; integrated circuit testing; printed circuit testing; IC testing; PC testing; board-level diagnosis; built-in signature analyzer; built-in-self-test board; distortions; production testing; signature analysis; single-error-correcting Hamming codes; single-faulty-chip model; space-time compressor; Automatic testing; Built-in self-test; Design engineering; Fault diagnosis; Hardware; Laboratories; Pattern analysis; System buses; System testing; Systems engineering and theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-8186-0870-6
Type :
conf
DOI :
10.1109/TEST.1988.207779
Filename :
207779
Link To Document :
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