Title :
A parallel algorithm for fault simulation on the Connection Machine
Author :
Narayanan, Vinod ; Pitchumani, Vijay
Author_Institution :
Dept. of Electron & Comput. Eng., Syracuse Univ., NY, USA
Abstract :
A fast algorithm for fault simulation, using data-level parallelism, is presented for the Connection Machine. The algorithm is of the parallel pattern single-fault-propagation type. An implementation in C language has been completed and results are presented
Keywords :
C language; automatic testing; fault location; logic testing; parallel processing; C language; Connection Machine; automatic testing; data-level parallelism; fault simulation; logic testing; parallel algorithm; single-fault-propagation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer architecture; Logic testing; Microcontrollers; Parallel algorithms; Parallel processing; Routing;
Conference_Titel :
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-0870-6
DOI :
10.1109/TEST.1988.207784
