Testability features in the TMS370 family of microcomputers

The TMS370 family of microcomputers was designed with a requirement for >99% stuck fault coverage. A design for testability (DFT) methodology called parallel/serial scan design was used which partitioned the design into independently testable modules along functional divisions. The automatically generated tests are then reuseable when the same functional module is included in a different configuration of microcomputer by simply concatenating the module tests. Thus, test preparation is only needed once per module. The DFT methodology is presented along with the application results