DocumentCode :
3110767
Title :
Sensitivity of a 20-GS/s InP DHBT latched comparator
Author :
Kraus, S. ; Makon, R.E. ; Kallfass, I. ; Driad, R. ; Moyal, M. ; Ritter, D.
Author_Institution :
Dept. of Electr. Eng., Technion - Israel Inst. of Technol., Haifa, Israel
fYear :
2010
fDate :
May 31 2010-June 4 2010
Firstpage :
1
Lastpage :
4
Abstract :
We present simulations and measurements of the sensitivity of a master-slave emitter-coupled logic (ECL) latched comparator implemented in an InP/GaInAs DHBT technology. The circuit exhibited simulated and experimental sensitivities of 11.5 mV and 17 mV, respectively, at a clock rate of 20 GHz, with no preamplifier.
Keywords :
comparators (circuits); gallium compounds; heterojunction bipolar transistors; indium compounds; DHBT latched comparator; InP-GaInAs; frequency 20 GHz; master-slave emitter-coupled logic latched comparator; voltage 11.5 mV; voltage 17 mV; Circuit simulation; Clocks; DH-HEMTs; Heterojunction bipolar transistors; Indium phosphide; Logic; Metastasis; Physics; Solid state circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Indium Phosphide & Related Materials (IPRM), 2010 International Conference on
Conference_Location :
Kagawa
ISSN :
1092-8669
Print_ISBN :
978-1-4244-5919-3
Type :
conf
DOI :
10.1109/ICIPRM.2010.5515962
Filename :
5515962
Link To Document :
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