DocumentCode
3111607
Title
Very high density probing
Author
Barsotti, C. ; Tremaine, S. ; Bonham, M.
fYear
1988
fDate
12-14 Sep 1988
Firstpage
608
Lastpage
614
Abstract
A discussion is presented on some of the problems encountered with probing at the wafer level and how this probe card technology helps to overcome those problems. Advancements needed in probe card technology include smaller pitches, faster speeds, bumped pads, internal and multidie probing. With the density of the die increasing, the pitch between pads on the die is being reduced. A pitch of 4 mils or less is common for faster, more complex devices, resulting in an almost unlimited growth of signal pins. Tape automated bonding (TAB) necessitates that bumps be placed on the pads of the die. Bumped pads must then be probed. Internal and multidie probing, although not a recent development, is being requested more often to help improve throughput
Keywords
VLSI; integrated circuit testing; lead bonding; packaging; probes; bumped pads; high density probing; internal probing; lead bonding; multidie probing; pitch; probe card technology; speeds; tape automated bonding; throughput; wafer level; Blades; Ceramics; Circuit testing; Costs; Impedance; Packaging; Probes; System testing; Throughput; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-8186-0870-6
Type
conf
DOI
10.1109/TEST.1988.207843
Filename
207843
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