Flexible deep memory architecture aids program development

The author describes a solution to the cost and programmability problems of analog VLSI tester pattern memory design that combines high-speed random-access memory with lower-cost deep dynamic memory to provide deep pattern storage without program restrictions at a reasonable cost. One of the benefits of the deep memory design is that the high-speed ECL (emitter-coupled logic) pattern address microcontroller need only manipulate a 16000-location address space, yet it has control over memory several million locations deep. The design of the interleaved memory address controller is simplified because the memory has no looping or conditional jumping requirements