• DocumentCode
    3112008
  • Title

    Detecting bridging faults with stuck-at test sets

  • Author

    Millman, Steven D. ; McCluskey, Edward J.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Stanford Univ., CA, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    773
  • Lastpage
    783
  • Abstract
    A method is described that provides high detection of bridging faults without requiring extensive fault simulation. Bridging fault coverage can be increased by doing fault simulation and test generation for bridging faults that are identified as hard to detect. These bridging faults occur between nodes that rarely, if ever, differ, or that seldom change value. In addition, if the nodes in the fault-free circuits toggle often, feedback faults are easier to detect. This is true even if the nodes involved always have equal values. Methods for identifying such nodes have been presented. These methods use results available from fault-free simulations. A simple solution is to randomly reorder the test vectors to increase toggling and therefore increase bridging fault coverage. As a result, computer time for test generation will be only slightly greater than the time required for stuck-at fault generation alone
  • Keywords
    automatic testing; fault location; logic testing; automatic testing; bridging faults; computer time; fault simulation; feedback faults; logic testing; stuck-at test sets; test generation; test vectors; toggling; CMOS logic circuits; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electrical fault detection; Fault detection; Feedback; Sampling methods; Semiconductor device modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207864
  • Filename
    207864