Title :
Emulative testing at the bus speed limit
Author :
Arnett, Douglas B. ; Bhaskar, K.S.
Author_Institution :
John Fluke Manuf. Co. Inc., Everett, WA, USA
Abstract :
An alternative is attempted to the bus-switch for bus cycle emulation, preferably one that was programmable, so as to minimize the amount of hardware to be designed for each microprocessor to be emulated. The evolution of the hardware architecture from the basic concept is discussed first, followed by a discussion of issues involved in programming the emulation. A problem-solution format is used to present each topic; problems that arise are described, and then proposed solutions are explained
Keywords :
automatic testing; computer interfaces; data communication equipment; architecture; automatic testing; bus cycle emulation; bus-switch; data communication equipment; emulative testing; problem-solution format; programming; Circuit testing; Clocks; Electronic circuits; Electronic equipment testing; Emulation; Hardware; Logic testing; Microprocessors; Read-write memory; Test equipment;
Conference_Titel :
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-0870-6
DOI :
10.1109/TEST.1988.207885
