DocumentCode :
3112783
Title :
CASTOR: state assignment in a finite state machine synthesis system
Author :
Rietsche, G. ; Neher, M.
Author_Institution :
Forschungszentrum Inf., Karlsruhe Univ., Germany
fYear :
1990
fDate :
29 May-1 Jun 1990
Firstpage :
130
Lastpage :
134
Abstract :
The authors describe some of the state assignment heuristics, which are applied in the finite state machine synthesis system CASTOR. They concentrate on algorithms for two-level logic implementations, while work on algorithms for multi-level logic implementations is in progress. Input to the system is a description of the FSM in form of a state table. CASTOR generates an appropriate controller consisting of pre- and postprocessing structures around a kernel FSM, which may be a PLA, a ROM or random logic. In the case of a PLA or random logical controller coding constraints are extracted for the kernel FSM. Then these coding constraints have to be satisfied by adequate state assignment algorithms in order to minimize the area of the physical implementation
Keywords :
finite automata; logic CAD; sequential switching; state assignment; CAD; CASTOR; PLA; ROM; coding constraints; finite state machine synthesis system; postprocessing structures; random logic; state assignment; state table; two-level logic implementations; Automata; Circuit synthesis; Control system synthesis; Design automation; Encoding; Minimization; Multiplexing; Programmable logic arrays; Read only memory; Subspace constraints;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Euro ASIC '90
Conference_Location :
Paris
Print_ISBN :
0-8186-2066-8
Type :
conf
DOI :
10.1109/EASIC.1990.207903
Filename :
207903
Link To Document :
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