The influence of “off-axis” from (100) oriented Si wafers on junction depth and sheet resistance for low-energy implantation and rapid thermal annealing

According to the recently released 1999 National Technology Roadmap for Semiconductors, the SID extension junction will be in the range of a few tens of nanometers for the up coming 180 nm and 130 nm nodes. Although the junctions have to become shallower, a decreasing sheet resistance is required. The formation of ultra-shallow junctions is mainly influenced by three important parameters, these are: dose and energy control during ion implantation, a controlled gaseous ambient during RTA (rapid thermal anneal), and a controlled and reproducible thermal budget during RTA. The requirements for production tools have become progressively more stringent, but the crystal off-orientation of the wafer surface condition as an issue in reproducible USJ formation has been neglected. In Si wafer production, the exact (100) orientation of the wafer surface is determined by the ingot sawing accuracy and typically done with a tolerance of +0.1°. Prior to this experiment, however, the influence of such a variance in the wafer off-orientations on the junction characteristics had not been investigated. For our experiments repeatable “off-axis” from (100) sliced 200 mm silicon wafers were implanted with ¹¹B⁺, ⁷⁵ As⁺ or ³¹P⁺ at a tilt and twist angle of 0° to investigate the effects on junction depth and sheet resistance. The acceleration voltage varied between 500 eV (¹¹B⁺) and 5 keV (⁷⁵As⁺). The off-orientation varied between exact 0° and the channeling-reduction-angle for boron of 7.00 (e.g. 0.35°, 1.0°, 4.0°). Species depending data of as-implanted distributions as well as soak time (1050°C 10 s) and flash annealed (with a ramp rate of 350 Ws) wafers are presented and the influences of the off-oriented sliced wafers on junction depth and sheet resistance are discussed