• DocumentCode
    3113622
  • Title

    Epi-replacement in CMOS technology by high dose, high energy boron implantation into Cz substrates

  • Author

    Bourdelle, K.K. ; Chen, Y. ; Ashton, R.A. ; Rubin, L.M. ; Agarwal, A. ; Morris, W.

  • Author_Institution
    Lucent Technol. Bell Labs., Orlando, FL, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    312
  • Lastpage
    315
  • Abstract
    We implanted high energy boron to create a heavily doped ground plane in Cz wafers to replace p/p+ epi-substrates in CMOS technology. Devices manufactured on Cz wafers with a 1.5 MeV, 1×1015cm-2 boron implanted ground plane have superior latch-up immunity as compared to devices on epi-wafers. Improvements in latch-up suppression were observed for all isolation spacings. Diode leakage was lower in high dose buried layer substrates than in epi substrates, while gate oxide integrity was equivalent. For the first time, buried layer substrates have been shown to duplicate or exceed the performance of epi silicon simultaneously for all relevant CMOS transistor and circuit parameters
  • Keywords
    boron; elemental semiconductors; ion implantation; leakage currents; semiconductor device breakdown; semiconductor diodes; silicon; 1.5 MeV; CMOS technology; CMOS transistor; Cz substrates; Cz wafers; Si:B; buried layer substrates; diode leakage; epi-replacement; gate oxide integrity; heavily doped ground plane; high dose buried layer substrates; high dose high energy boron implantation; isolation spacings; latch-up immunity; latch-up suppression; p/p+ epi-substrates; Boron; CMOS technology; Circuits; Diodes; Epitaxial layers; Implants; Isolation technology; Manufacturing; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Ion Implantation Technology, 2000. Conference on
  • Conference_Location
    Alpbach
  • Print_ISBN
    0-7803-6462-7
  • Type

    conf

  • DOI
    10.1109/.2000.924151
  • Filename
    924151