DocumentCode
3113662
Title
Configurable EEPROMS for ASICS
Author
Carney, Bob ; Lucero, Elroy ; Mendel, Robi ; Reiter, Herb
Author_Institution
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear
1988
fDate
16-19 May 1988
Abstract
A 5-V only, variable-size EEPROM (electrically erasable programmable read-only memory) is discussed. A test chip providing 256×8-bit memory is described, as well as the methodology used to implement it. Certain special nonvolatile memory circuits are investigated. Application areas, manufacturing issues, and testing techniques are also considered
Keywords
PROM; integrated memory circuits; 2 kbits; configurable memory; electrically erasable programmable read-only memory; manufacturing issues; nonvolatile memory circuits; test chip; testing techniques; variable-size EEPROM; Application specific integrated circuits; DH-HEMTs; EPROM; Latches; Logic arrays; Power generation; Power supplies; Random access memory; Read-write memory; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/CICC.1988.20795
Filename
20795
Link To Document