Electrical comparison of parallel beam and batch implanters

We processed several split lots to determine the effect of beam parallelism on both batch and serial implanters. The effect of varying tilt angles and the use of quadrature implants on device-related parameters has been examined, to establish if threshold voltage control can be improved by utilizing a parallel scanned implanter over a batch implanter. An advanced 0.35 μm RF analog technology, with stacked transistors which are very sensitive to implanter variation and threshold voltage control was used to test various implanters and implant conditions. Full flow NMOS devices have been generated in a 200 mm CMOS line. All implant variables were held constant except tilt, rotation, and implanter architecture; no other splits or deviations from standard processing were introduced. The splits include parallel beam vs. batch implanter, with and without quadrature rotation, and a variation of tilt from 0 to 2 degrees. Electrical parameters, from each of the splits were analyzed for statistical significance against each split. Both the batch and parallel beam implanters are statistically equivalent in matching. Stacked transistors show that the best matching was obtained from the quadrature splits. We conclude that there is no statistical difference between a parallel beam and batch implanter. The largest improvements in transistor mismatch were achieved by the utilization of quadrature implants