• DocumentCode
    3114035
  • Title

    369 Tflop/s molecular dynamics simulations on the Roadrunner general-purpose heterogeneous supercomputer

  • Author

    Swaminarayan, Sriram ; Germann, Timothy C. ; Kadau, Kai ; Fossum, Gordon C.

  • Author_Institution
    Los Alamos Nat. Lab., Los Alamos, NM, USA
  • fYear
    2008
  • fDate
    15-21 Nov. 2008
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    We present timing and performance numbers for a short-range parallel molecular dynamics (MD) code, SPaSM, that has been rewritten for the heterogeneous Roadrunner supercomputer. Each Roadrunner compute node consists of two AMD Opteron dualcore microprocessors and four PowerXCell 8i enhanced Cell microprocessors, so that there are four MPI ranks per node, each with one Opteron and one Cell. The interatomic forces are computed on the Cells (each with one PPU and eight SPU cores), while the Opterons are used to direct inter-rank communication and perform I/O-heavy periodic analysis, visualization, and checkpointing tasks. The performance measured for our initial implementation of a standard Lennard-Jones pair potential benchmark reached a peak of 369 Tflop/s double-precision floating-point performance on the full Roadrunner system (27.7% of peak), corresponding to 124 MFlop/Watt/s at a price of approximately 3.69 MFlops/dollar. We demonstrate an initial target application, the jetting and ejection of material from a shocked surface.
  • Keywords
    application program interfaces; coprocessors; floating point arithmetic; message passing; microprocessor chips; molecular dynamics method; parallel machines; AMD Opteron dualcore microprocessors; I/O-heavy periodic analysis; MPI ranks; PowerXCell 8i enhanced Cell microprocessors; Roadrunner general-purpose heterogeneous supercomputer; SPaSM; checkpointing task; interatomic forces; molecular dynamics simulation; shocked surface; short-range parallel molecular dynamics code; standard Lennard-Jones pair potential; visualization task; Clustering algorithms; Collaboration; Computer architecture; Coprocessors; Laboratories; Memory management; Microprocessors; Permission; Postal services; Supercomputers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing, Networking, Storage and Analysis, 2008. SC 2008. International Conference for
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-2834-2
  • Electronic_ISBN
    978-1-4244-2835-9
  • Type

    conf

  • DOI
    10.1109/SC.2008.5214713
  • Filename
    5214713