• DocumentCode
    311442
  • Title

    Half-rate GSM vocoder implementation on a dual mac digital signal processor

  • Author

    Prasad, Mohit K. ; Arcy, Paul D. ; Gupta, Arup ; Diamondstein, Marc S. ; Srinivas, Hosahnlli R.

  • Author_Institution
    Wireless & Multimedia, Microelectron. Group, Lucent Technol., Allentown, PA, USA
  • Volume
    1
  • fYear
    1997
  • fDate
    21-24 Apr 1997
  • Firstpage
    619
  • Abstract
    The Global System for Mobile (GSM) communications uses a 13 Kbps vocoder which expands to 22.8 Kbps after channel coding. To increase the user capacity the half-rate channel has a gross transfer rate of 11.4 Kbps. The vocoder for the half-rate channels operates at 5.6 Kbps. The computational requirements of a half-rate vocoder and other necessary services required design of an entirely new digital signal processing architecture geared towards l-D signal and speech processing. The architecture is characterized by Very Large Instruction Word (VLIW) and two multiply-accumulate (MAC) units. Other enhancements of the hardware allow an efficient implementation of the half-rate GSM vocoder. This paper describes the architecture and compares the vocoder performance with existing implementations
  • Keywords
    cellular radio; computer architecture; digital signal processing chips; vocoders; GSM vocoder; Very Large Instruction Word; digital signal processing architecture; dual mac digital signal processor; half-rate GSM vocoder; vocoder performance; Channel capacity; Channel coding; Computer architecture; Digital signal processing; GSM; Mobile communication; Signal design; Signal processing; Speech processing; Vocoders;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, 1997. ICASSP-97., 1997 IEEE International Conference on
  • Conference_Location
    Munich
  • ISSN
    1520-6149
  • Print_ISBN
    0-8186-7919-0
  • Type

    conf

  • DOI
    10.1109/ICASSP.1997.599844
  • Filename
    599844