DocumentCode :
3114433
Title :
Compact and low power on-line self-testing voting scheme
Author :
Metra, Cecilia ; Favalli, Michele ; Riccò, Bruno
Author_Institution :
Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
fYear :
1997
fDate :
20-22 Oct 1997
Firstpage :
137
Lastpage :
145
Abstract :
In this paper a novel self-checking voting scheme for TMR systems is presented. With respect to the other available solutions it features the advantages of requiring lower area overhead and power consumption, with no degradation of on-line self-testing ability and speed. Consequently it is suitable for TMR systems to be used in critical applications where, besides high reliability, also low area overhead and power consumption are relevant constraints
Keywords :
fault tolerant computing; majority logic; redundancy; TMR systems; area overhead; fault-tolerant techniques; majority voting; on-line self-testing voting scheme; power consumption; reliability; triple modular redundancy; Application software; Availability; Built-in self-test; Circuit faults; Degradation; Energy consumption; Fault tolerance; Monitoring; Power system reliability; Voting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on
Conference_Location :
Paris
ISSN :
1550-5774
Print_ISBN :
0-8186-8168-3
Type :
conf
DOI :
10.1109/DFTVS.1997.628319
Filename :
628319
Link To Document :
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