• DocumentCode
    3114537
  • Title

    EURO ASIC ´90 (Cat. No.90TH0316-0)

  • fYear
    1990
  • fDate
    May 29 1990-June 1 1990
  • Abstract
    The following topics are dealt with: mixed analog/digital ASICs (application-specific integrated circuits); ASIC architecture; logic and architecture synthesis; general architecture ASICs; processor and interprocessor-communication ASICs; VHDL (VLSI Hardware Description Language) applications; ASICs for digital signal processing; ASIC floorplanning; ASICs for dedicated computation; ASICs for graphic processing; testing digital ASICs; timing verification; industrial testing; telecommunication ASICs; computer-aided design (CAD); verification
  • Keywords
    VLSI; application specific integrated circuits; circuit layout CAD; integrated logic circuits; microprocessor chips; ASIC floorplanning; ASICs for dedicated computation; ASICs for digital signal processing; ASICs for graphic processing; CAD; VHDL; VLSI Hardware Description Language; application-specific integrated circuits; circuit layout; computer-aided design; conference; industrial testing; interprocessor-communication; mixed analog/digital ASICs; mixed mode ICs; processor communication; telecommunication ASICs; testing digital ASICs; timing verification; verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Euro ASIC '90
  • Conference_Location
    Paris, France
  • Print_ISBN
    0-8186-2066-8
  • Type

    conf

  • DOI
    10.1109/EASIC.1990.207993
  • Filename
    207993