Link path design on a block-by-block basis

In high-speed data communication systems, the complexity of link path between transmitters and receivers present a challenge for designers to maintain an acceptable bit error rate. An approach is presented in this paper to design the link path on a block-by-block basis. The unique advantage of this approach lies on the physics-based model of each block, which relates performance to geometry and makes design improvement and optimization possible. An example link path involving a backpanel is investigated using the approach. The via stubs and the dielectric materials in the backpanel are demonstrated to be critical factors for link performance in certain situations.