DocumentCode
3115922
Title
Duty-cycle distortion and specifications for jitter test-signal generation
Author
Marcu, Mihai ; Durbha, Sriram ; Gupta, Sanjeev
Author_Institution
EEsof-EDA, Agilent Technol. Inc., Santa Rosa, CA
fYear
2008
fDate
18-22 Aug. 2008
Firstpage
1
Lastpage
4
Abstract
Duty-cycle distortion is one of the causes of deterministic jitter. Clarification and refinement of this jitter type is presented here. The jitter-tree is then updated with the jitter types discussed. Predicting the behavior of electrical systems under stress from jitter through simulations is limited by the availability of signal sources with controllable and flexible jitter properties in the design environment. A jitter specification method for ISI and DCD is recommended.
Keywords
distortion; signal generators; timing jitter; trees (mathematics); ISI; duty-cycle distortion; electrical system behavior; jitter specification method; jitter test-signal generation; jitter-tree; Character generation; Clocks; Distortion; Frequency; Intersymbol interference; Jitter; Performance evaluation; Signal generators; Software measurement; Testing; DCD; duty-cycle distortion; jitter; jitter components; jitter generation; jitter test;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility, 2008. EMC 2008. IEEE International Symposium on
Conference_Location
Detroit, MI
Print_ISBN
978-1-4244-1699-8
Electronic_ISBN
978-1-4244-1698-1
Type
conf
DOI
10.1109/ISEMC.2008.4652150
Filename
4652150
Link To Document