DocumentCode :
3117337
Title :
A unified hardware/software co-synthesis solution for signal processing systems
Author :
Bezati, Endri ; Yviquel, Hervé ; Raulet, Mickaël ; Mattavelli, Marco
Author_Institution :
Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
fYear :
2011
fDate :
2-4 Nov. 2011
Firstpage :
1
Lastpage :
6
Abstract :
This paper presents a methodology to specify from a high-level data-flow description an application for both hardware and software synthesis. Firstly, an introduction to RVC-Cal data-flow programming and Orcc framework is presented. Furthermore, an analysis of a close to gate intermediate representation (XLIM) is bestowed. As a proof of concept a JPEG codec was written purely in RVC-Cal to test the co-synthesis tools and then an analysis of the generated hardware and software results are given. Our experience shows that using RVC-Cal can unify the process of creating the same application for software and hardware without modifying a single source code for each solution.
Keywords :
hardware-software codesign; signal processing equipment; JPEG codec; Orcc framework; RVC-Cal data-flow programming; XLIM; hardware synthesis; hardware/software co-synthesis; high-level data-flow description; signal processing systems; single source code; software synthesis; Codecs; Decoding; Field programmable gate arrays; Hardware; Hardware design languages; Software; Transform coding; Co-Design; Co-Synthesis; Dataflow; FPGA; JPEG; OpenForge; Orcc; RVC-CAL; XLIM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Architectures for Signal and Image Processing (DASIP), 2011 Conference on
Conference_Location :
Tampere
Print_ISBN :
978-1-4577-0620-2
Electronic_ISBN :
978-1-4577-0619-6
Type :
conf
DOI :
10.1109/DASIP.2011.6136877
Filename :
6136877
Link To Document :
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