Title :
Au-Au ‘cold-weld’ bond strength in adhesively bonded flip-chip interconnects
Author :
Sinha, K. ; Farley, D. ; Kahnert, T. ; Dasgupta, A. ; Caers, J.F.J. ; Zhao, X.J.
Author_Institution :
Mech. Eng. Dept., Univ. of Maryland, College Park, MD, USA
Abstract :
In the conversion towards Pb-free electronics, there has been increasing interest in conductive adhesive interconnects, as they combine Pb-free materials with an attractive, low temperature, processing. One such promising packaging concept is direct bonding of flip-chip dies onto printed wiring boards (PWBs), with adhesive bonds between a gold-bumped flip-chip IC and matching gold-plated copper pads on a substrate. The goal is to achieve very high I/O densities per unit area, that are currently difficult to achieve, but are critical enablers for next-generation flexible electronic system. The fabrication process relies on adhesive joining methods and requires the simultaneous application of adhesive, pressure, temperature, and time to form the interconnection. The reliability of this interconnection under cyclic thermal excursions is traditionally believed to be governed by stress relaxation mechanisms in the adhesive. However, experiments conducted in this study suggest that under typical bonding conditions, a metallurgical bond can be established between these mating gold surfaces, due to cold-welding. If true, this implies a significantly different reliability mechanism for this interconnection method, and this mechanism must be understood so we can harness it for optimum reliability. The aim of this research work is to improve the effectiveness of interconnection processes for Au bumped flip-chip ICs. If successful, this study will enable significant cost-effective improvements in the reliability of wafer-level IC packaging technologies.
Keywords :
flip-chip devices; gold; integrated circuit interconnections; integrated circuit reliability; printed circuits; wafer level packaging; Au-Au; I-O densities per unit area; Pb-free electronics; adhesive joining methods; adhesively bonded flip-chip interconnects; cold-weld bond strength; conductive adhesive interconnects; cyclic thermal excursions; fabrication process; flip-chip IC; metallurgical bond; next generation flexible electronic system; printed wiring boards; reliability mechanism; stress relaxation mechanisms; wafer-level IC packaging technologies; Adhesives; Films; Gold; Integrated circuits; Iron; Lead;
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2011 12th International Conference on
Conference_Location :
Linz
Print_ISBN :
978-1-4577-0107-8
DOI :
10.1109/ESIME.2011.5765834