DocumentCode :
3117675
Title :
Timing vulnerability factors of sequential elements in modern microprocessors
Author :
Bramnik, Arkady ; Sherban, Andrei ; Seifert, N.
Author_Institution :
Intel Corp. Haifa, Haifa, Israel
fYear :
2013
fDate :
8-10 July 2013
Firstpage :
55
Lastpage :
60
Abstract :
An efficient and novel technique for computing timing vulnerability factors (TVF) in modern complex synchronous designs is introduced, where all key inputs are based on static timing data readily available in most design databases. The benefits of TVF for modern microprocessors and strategies to reduce TVF, and hence the overall soft error rate (SER), are presented.
Keywords :
integrated circuit reliability; microprocessor chips; radiation hardening (electronics); timing; SER reduction; TVF reduction; complex synchronous design; microprocessors; sequential elements; soft error rate reduction; static timing data; timing vulnerability factors; Testing; SER; TVF; soft error; timing derating; timing vulnerability factor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International
Conference_Location :
Chania
Type :
conf
DOI :
10.1109/IOLTS.2013.6604051
Filename :
6604051
Link To Document :
بازگشت