Characterization on ESD devices with test structures in silicon germanium RF BiCMOS process

Author

Ker, Ming-Dou ; Woei-Lin Wu ; Chang, Chyh-Yih

Author_Institution

Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2004

fDate

22-25 March 2004

Firstpage

7

Lastpage

12

Abstract

Different electrostatic discharge (ESD) devices in a 0.35-μm silicon germanium (SiGe) RF BiCMOS process are characterized in detail by a transmission line pulse (TLP) generator and ESD simulator for on-chip ESD protection design. The test structures of diodes with different p-n junctions and the silicon-germanium heterojunction bipolar transistors (HBTs) with different layout parameters have been fabricated to investigate their ESD robustness. The human-body-model (HBM) ESD robustness of SiGe HBTs with the optional low-voltage (LV), high-voltage (HV), and high-speed (HS) implantations has been measured and compared in the experimental test chips.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; doping profiles; electrostatic discharge; heterojunction bipolar transistors; radiofrequency integrated circuits; semiconductor device measurement; semiconductor diodes; semiconductor materials; 0.35 micron; ESD device characterization; ESD robustness; HBM; HBT layout parameters; RF BiCMOS process; SiGe; TLP; electrostatic discharge devices; heterojunction bipolar transistors; high-speed implantations; high-voltage implantations; human-body-model; low-voltage implantations; on-chip ESD protection; p-n junction diodes; test structures; transmission line pulse generator; BiCMOS integrated circuits; Character generation; Electrostatic discharge; Germanium silicon alloys; Pulse generation; Radio frequency; Robustness; Silicon germanium; Testing; Transmission lines;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on

Print_ISBN

0-7803-8262-5

Type

conf

DOI

10.1109/ICMTS.2004.1309292

Filename

1309292