• DocumentCode
    3117742
  • Title

    Test structures to verify ESD robustness of on-glass devices in LTPS technology

  • Author

    Ker, Ming-Dou ; Deng, Chih-Kang ; Yang, Sheng-Chieh ; Tasi, Yaw-Ming

  • Author_Institution
    Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    2004
  • fDate
    22-25 March 2004
  • Firstpage
    13
  • Lastpage
    17
  • Abstract
    Different test structures, used to investigate the electrostatic discharge (ESD) robustness of on-glass devices in a low temperature poly-Si (LTPS) process, are proposed in this paper. A transmission line pulse generator (TLPG) is used to monitor the I-V behavior of on-glass devices in the high-current region, and to evaluate the robustness of those LTPS devices during ESD stress conditions. Finally, a successful ESD protection design with P+-i-N+ diodes and a VDD-to-VSS ESD clamp circuit integrated on an LCD panel has been demonstrated with a machine-model (MM) ESD level of up to 275 V, whereas the traditional one can only sustain 100 V MM ESD stress.
  • Keywords
    electrostatic discharge; elemental semiconductors; liquid crystal displays; p-i-n diodes; pulse generators; semiconductor device measurement; silicon; thin film transistors; 100 V; 275 V; ESD protection; ESD robustness; ESD stress conditions; I-V characteristics; LCD panel; LTPS technology; Si; TFT devices; TLPG; VDD-to-VSS ESD clamp; electrostatic discharge; high-current region; low temperature poly-Si process; machine-model ESD level; on-glass devices; p-i-n diodes; transmission line pulse generator; Condition monitoring; Diodes; Electrostatic discharge; Protection; Pulse generation; Robustness; Stress; Temperature; Testing; Transmission lines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on
  • Print_ISBN
    0-7803-8262-5
  • Type

    conf

  • DOI
    10.1109/ICMTS.2004.1309293
  • Filename
    1309293