Linearising sigma-delta modulators using dither and chaos

Recent work has shown that high-order single-bit sigma-delta modulators suffer from low-level artifacts such as idle tones and noise modulation. Techniques that have been proposed to reduce or eliminate these errors include the application of dither inside the one-bit quantiser loop, and selecting a loop filter which makes the modulator chaotic. This paper compares the efficacy of these two approaches by simulating high-resolution sigma-delta modulators suitable for audio-conversion applications. Dynamic-range penalties for successful linearisation are determined for two types of dither signal and two classes of chaos