Simulation of QPSK high data rate receiver: modeling of tracking loops and adaptive equalizer

The simulation effort supporting the design of the high data rate receiver for the second tracking and data relay satellite system ground terminal is detailed. The receiver accepts quadrature phase shift keying (QPSK) signals at data rates from 6 to 300 Mb/s. The modeling of the Costas tracking loop that tracks the phase of the carrier signal and the clock recovery loop that aligns the data timing, both of which include hardlimiting functions that add a degree of nonlinearity to the designs, is discussed. The simulation of the equalizer, which applies a least-mean-squares adaptive algorithm to remove the intersymbol interference and crosstalk from the channel in order to improve the end-to-end link performance, is also addressed. Simulation results are provided