A video rate 16×16 discrete cosine transform IC

Author

Gottlieb, A.M. ; Sun, M.T. ; Chen, T.C.

Author_Institution

Bellcore, Morristown, NJ, USA

fYear

1988

fDate

16-19 May 1988

Abstract

The first fully operational implementation of a complete 16×16 discrete cosine transform (DCT) on a single chip with the speed and the resolution necessary for video images is described. Using a pipelined concurrent architecture, the DCT IC was designed for real-time processing of 14.3-MHz sampled video data. Distributed arithmetic combined with bit-serial and bit-parallel structures is used to implement the required vector inner products concurrently. The chip accepts 9-bit inputs and produces 14-bit DCT coefficients. The circuit has been laid out using the symbolic design tool MULGA. The chip contains approximately 73000 transistors and was fabricated using a double metal n-well 2-μm CMOS technology

Keywords

CMOS integrated circuits; VLSI; circuit layout CAD; computerised picture processing; digital arithmetic; microprocessor chips; pipeline processing; 14.3 MHz; 2 micron; 9 bit; CMOS technology; MULGA; bit serial structures; bit-parallel structures; discrete cosine transform IC; pipelined concurrent architecture; real-time processing; sampled video data; symbolic design tool; vector inner products; Adders; Arithmetic; CMOS technology; Circuits; Discrete cosine transforms; Discrete transforms; Image coding; Shift registers; Transform coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/CICC.1988.20822

Filename

20822