DocumentCode

3118188

Title

7ns 4Mb BICMOS SRAM With Parallel Testing Circuit

Author

Okajima, Y. ; Sato, Y. ; Kurosaki, K. ; Yamada, S.

Author_Institution

Fujitsu Limited

fYear

1991

fDate

13-15 Feb. 1991

Firstpage

54

Lastpage

289

Keywords

BiCMOS integrated circuits; CMOS process; Circuit testing; Decoding; Electrodes; MOSFETs; Random access memory; Read-write memory; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-87942-644-6

Type

conf

DOI

10.1109/ISSCC.1991.689061

Filename

689061