DocumentCode :
3118922
Title :
A heuristic global router for polycell layout
Author :
De, Vivek K. ; Kozminski, Krzysztof ; Kedem, Gershon
Author_Institution :
Duke Univ., Durham, NC, USA
fYear :
1988
fDate :
16-19 May 1988
Abstract :
A novel heuristic global routing algorithm has been developed and implemented. The advantage of using heuristics for routing is that they can achieve a close-to-optimal solution in a reasonable amount of computation time. It is shown that in most cases the router achieves as good or better layout area and total wirelength as the TimberWolf global router which uses the inherently time-expensive technique of simulated annealing. It is concluded by using good heuristics that the potentially computation-intensive problem of optimal global routing can be solved efficiently without trading off a significant amount of optimality
Keywords :
cellular arrays; circuit layout CAD; integrated logic circuits; CAD; heuristic global router; heuristics; optimal global routing; polycell layout; wirelength; Circuits; Conducting materials; Design automation; Design methodology; Joining processes; Pins; Routing; Steiner trees; Very large scale integration; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
Type :
conf
DOI :
10.1109/CICC.1988.20846
Filename :
20846
Link To Document :
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