Low-power, 4.6-GHz, Stable Oscillator for CSAC.

Author

Römisch, Stefania ; Lutwak, Robert

Author_Institution

Spectral Res., Louisville, CO

fYear

2006

fDate

38869

Firstpage

448

Lastpage

451

Abstract

The chip-scale atomic clock (CSAC) requires a microwave source to interrogate the Cs ground-state hyperfine resonance in a scheme where the oscillator´s frequency is half of the 9.2 GHz resonance frequency. This paper describes the design and implementation of a 4.6 GHz voltage-controlled oscillator (VCO) with relative frequency stability of 6.5middot10^-9 for measurement times of 1 second. The tuning range has been measured to be larger than 4 MHz. The VCO is designed using a modified Colpitts circuit topology and has a power consumption of about 10 mW. Similar oscillators have been demonstrated which exhibit slightly lower power consumption but 5 times worse frequency stability (Brannon, 2005)

Keywords

atomic clocks; chip scale packaging; low-power electronics; network topology; voltage-controlled oscillators; 10 mW; 4 MHz; 4.6 GHz; CSAC; Colpitts circuit topology; VCO; chip scale atomic clock; low power; relative frequency stability; stable oscillator; voltage controlled oscillator; Atomic clocks; Circuit optimization; Circuit stability; Energy consumption; Frequency measurement; Microwave oscillators; Resonance; Resonant frequency; Tuning; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

International Frequency Control Symposium and Exposition, 2006 IEEE

Conference_Location

Miami, FL

Print_ISBN

1-4244-0074-0

Electronic_ISBN

1-4244-0074-0

Type

conf

DOI

10.1109/FREQ.2006.275427

Filename

4053805