• DocumentCode
    3120465
  • Title

    Realization of NMAX and NMIN functions with multi-valued voltage comparators

  • Author

    Inaba, Motoi ; Tanno, Koichi ; Ishizuka, Okihiko

  • Author_Institution
    Fac. of Eng., Miyazaki Univ., Japan
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    27
  • Lastpage
    32
  • Abstract
    In this paper, realization of three fundamental functions, NOT, negated MAX and negated MIN functions, in the voltage-mode quaternary logic is presented. First, the high-performance NOT circuits with the down literal circuits are composed. The proposed NOT circuits have the quantified effect to realize high noise margins in the voltage-mode quaternary logic circuits. Next, we propose the voltage comparator with the NOT circuit, and, as applications of the voltage comparator, NMAX and NMIN circuits are designed. They can realize the negated MAX and the negated MIN functions, respectively. The advantages of these proposed circuits are fabrication with a conventional CMOS process, high noise margins of more than 0.46[V] and low power consumption with peak of less than 350[μW] under 3.0[V] of the supply voltage in verification using HSPICE simulations
  • Keywords
    NOR circuits; comparators (circuits); multivalued logic circuits; power consumption; HSPICE simulations; NMAX functions; NMIN functions; NOT circuits; multi-valued voltage comparators; negated MAX circuits; negated MIN functions; voltage comparator; voltage-mode quaternary logic; voltage-mode quaternary logic circuits; CMOS process; Circuit noise; Circuit simulation; Energy consumption; Fabrication; Large scale integration; Logic circuits; Multivalued logic; Threshold voltage; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2001. Proceedings. 31st IEEE International Symposium on
  • Conference_Location
    Warsaw
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-1083-3
  • Type

    conf

  • DOI
    10.1109/ISMVL.2001.924551
  • Filename
    924551