• DocumentCode
    3120698
  • Title

    Case of via resistance increase during thermal cycle

  • Author

    Drizlikh, Sergei ; Francis, Thomas

  • Author_Institution
    Nat. Semicond. Corp., South Portland, ME, USA
  • fYear
    2004
  • fDate
    4-6 May 2004
  • Firstpage
    162
  • Lastpage
    164
  • Abstract
    We report on a case of via resistance increase after process induced thermal cycles. Evidence of volume expansion at via bottom is shown on cross sections, with complete disconnect between the W plug and ARC TiN in worst case. The problem is traced to interaction between Fluorine implanted into TiN ARC during the oxide overetch step and Ti portion of the via liner. When liner Ti is treated by N2 plasma prior to CVD TiN deposition, the problem is reduced.
  • Keywords
    antireflection coatings; chemical vapour deposition; electric resistance; electrical resistivity; etching; fluorine; integrated circuit metallisation; nitridation; plasma materials processing; titanium compounds; ARC; CVD TiN deposition; TiN:F; W plug; antireflection coating; oxide overetch; plasma treatment; thermal cycle; via resistance; volume expansion; Computer aided software engineering; Delamination; Dielectrics; Etching; Plasma applications; Plasma chemistry; Stress; Thermal decomposition; Thermal resistance; Tin alloys;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop
  • Print_ISBN
    0-7803-8312-5
  • Type

    conf

  • DOI
    10.1109/ASMC.2004.1309557
  • Filename
    1309557
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3120698