Exploring design space of parallel realizations: MPEG-2 decoder case study

Author

Dwivedi, Basant K. ; Hoogerbrugge, Jan ; Stravers, Paul ; Balakrishnan, M.

Author_Institution

Indian Inst. of Technol., Delhi, India

fYear

2001

fDate

2001

Firstpage

92

Lastpage

97

Abstract

Many applications lend them to parallelism at different levels of granularity. We first identify the key issues involved in creating a parallel model of an application. These are done with a view to estimate performance and explore the “parallel” design space to select a suitable design point. The framework presented provides an opportunity to perform this exploration both in the target architecture independent and target architecture dependent manner. An MPEG-2 decoder model in YAPI has been presented which has more parallelism and improved performance. This model has further been mapped onto SpaceCAKE architecture to study its architectural parameters. Detailed results obtained with YAPI simulation (target architecture independent) and TSS simulation (after process-processor binding) on MPEG-2 decoder application establish the effectiveness of our approach

Keywords

decoding; digital simulation; parallel architectures; performance evaluation; MPEG-2 decoder; SpaceCAKE architecture; TSS simulation; YAPI; YAPI simulation; design space exploration; granularity; parallel model; parallel realizations; performance; target architecture; Application software; Computer aided software engineering; Computer architecture; Decoding; HDTV; Parallel processing; Permission; Signal processing algorithms; Space exploration; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Hardware/Software Codesign, 2001. CODES 2001. Proceedings of the Ninth International Symposium on

Conference_Location

Copenhagen

Print_ISBN

1-58113-364-2

Type

conf

DOI

10.1109/HSC.2001.924657

Filename

924657