Title :
A test system for high speed VLSI array qualification
Author :
Hahn, E.F. ; Rolfes, Timothy J. ; Zajkowski, Peter J.
Author_Institution :
IBM Corp., Hopewell Junction, NY, USA
Abstract :
A description is given of the array chip characterizer (ARCC), a 225-MHz test system designed for use in the component qualification cycle. It is an engineering development tool used to verify the functional objectives of components and to determine operating margins and sensitivities. The ARCC is an isochronous machine, deriving its time base from a high-stability programmable frequency synthesizer. The ARCC is driven from an IBM 4381 host processor via a direct I/O channel connection. Test application program development is accomplished using a high-level language (Pascal) running in a large VM-based system environment. An expert system is used to allocate tester resources (i.e. driver/detector pins, buffers, etc.) for a given definition of component I/O pins. The ARCC is made up of four major functional units: a pattern generation unit, a pin electronics unit, a device support unit, and a pattern verification unit. Each functional unit consists of two frames: a power frame and a logic frame. A microprocessor-based subsystem is used to monitor and control power in each of the four power frames
Keywords :
VLSI; automatic test equipment; cellular arrays; integrated circuit testing; integrated logic circuits; 225 MHz; ARCC; IBM 4381 host processor; Pascal; VM-based system environment; allocate tester resources; array chip characterizer; component qualification cycle; determine operating margins; device support unit; direct I/O channel connection; engineering development tool; expert system; functional units; high speed VLSI array qualification; high-stability programmable frequency synthesizer; isochronous machine; logic frame; microprocessor-based subsystem; pattern generation unit; pattern verification unit; pin electronics unit; power frame; test system; Detectors; Driver circuits; Expert systems; Frequency synthesizers; High level languages; Pins; Qualifications; Resource management; System testing; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20879