DocumentCode :
3122410
Title :
Architecture and Implementation of Modular Airthmetic Unit for SOC
Author :
Ahmad, Mohammad Hammad ; Alam, Syed Wasi ; Baig, Irum
Author_Institution :
Comput. Eng. Dept., Univ. of Eng. & Technol. Taxila, Taxila, Pakistan
fYear :
2011
fDate :
19-21 Dec. 2011
Firstpage :
106
Lastpage :
109
Abstract :
In last decade of the twentieth century electronic gadgets penetrated our lives in huge numbers. During the development of such technologies operation of the devices/protocols was the main concern and the security aspect was ignored. But the losses that occur due to security breaches resulted in security conscious designs. The direction of technological advancement is also towards more functionality in less area. In such cases security is usually the last preference. There is also more advancement in chip fabrication per unit area that brings the concept of system on chip (SOC). So to take the advantage of small fabrication per unit area for security enhancement we propose the architecture of modular arithmetic unit (MAU) as part of the new SOC in order to implement cryptographic algorithms in an efficient manner. MAU is designed keeping in view ease of interfacing with any processor on SOC. Thus cryptographic algorithms that are based on modular arithmetic can be written in high level language and executed on processor of SOC. MAU is implemented on Xilinx Spartan 3 which shows flexibility, scalability and less area. The implementation results show area consumption of 1500 slices.
Keywords :
cryptography; high level languages; system-on-chip; MAU; SOC; Xilinx Spartan 3; chip fabrication; cryptographic algorithms; electronic gadgets; high level languages; modular airthmetic unit; modular arithmetic unit; security aspect; security enhancement; system on chip; technological advancement; Algorithm design and analysis; Computer architecture; Elliptic curve cryptography; Field programmable gate arrays; System-on-a-chip; FPGA; Modular Airthmetic Unit; Modular airthmetic; SOC; modular addition; modular multiplication; modular subtraction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Frontiers of Information Technology (FIT), 2011
Conference_Location :
Islamabad
Print_ISBN :
978-1-4673-0209-8
Type :
conf
DOI :
10.1109/FIT.2011.27
Filename :
6137128
Link To Document :
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