DocumentCode :
312380
Title :
A performance analysis of the partial randomization dynamic element matching DAC architecture
Author :
Jensen, Henrik T. ; Galton, Ian
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
Volume :
1
fYear :
1997
fDate :
9-12 Jun 1997
Firstpage :
9
Abstract :
This paper presents the results of a performance analysis of a novel dynamic element matching technique for low harmonic distortion digital-to-analog converters. The technique promises to be suitable for applications such as direct digital synthesis systems, wherein low hardware complexity is essential in addition to low harmonic distortion. As the main result of the analysis, the DAC can be designed such that the hardware complexity is reduced to a minimum while still providing a given least required spurious-free dynamic range
Keywords :
digital-analogue conversion; direct digital synthesis; harmonic distortion; DAC architecture; direct digital synthesis systems; dynamic element matching; hardware complexity; harmonic distortion; partial randomization; performance analysis; spurious-free dynamic range; Analytical models; Art; Clocks; Computer architecture; Dynamic range; Hardware; Harmonic distortion; Performance analysis; Storage area networks; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
Type :
conf
DOI :
10.1109/ISCAS.1997.608495
Filename :
608495
Link To Document :
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