Title :
Multi-slope analog-to-digital converters modeling based on VHDL-AMS
Author :
Maghrebi, Raja ; Masmoudi, Mohamed
Author_Institution :
Dept. of Electr. Eng., Nat. Sch. of Eng. of Sfax, Tunisia
Abstract :
This paper attempts to validate the conversion algorithm of a multi-slope self-calibrated analog-to-digital converter by means of VHDL-AMS. A static test has been performed for a 8-b multi-slope self-calibrated A/D converter. Obtained results in terms of linearity errors (DNL and INL) proved the efficiency of the converter in several applications.
Keywords :
analogue-digital conversion; calibration; formal verification; hardware description languages; VHDL-AMS; conversion algorithm; formal validation; linearity errors; mixed signal circuit; multi-slope analog-to-digital converter modeling; self-calibrated A/D converter; Analog-digital conversion; Calibration; Circuit simulation; Clocks; Counting circuits; Fabrication; Hardware design languages; Logic; Oscillators; Pipelines;
Conference_Titel :
Systems, Man and Cybernetics, 2002 IEEE International Conference on
Print_ISBN :
0-7803-7437-1
DOI :
10.1109/ICSMC.2002.1175607
